Semiconductor Safety Analysis for ICs and IPs
Provide engineering activities on Functional Safety analyses for safety-critical semiconductor IPs, ICs, and SoCs to identify failure modes, evaluate diagnostic effectiveness, and demonstrate compliance with the required hardware safety metrics.
Activities & Deliverables:
- FMEA / DFMEA – Identification and assessment of potential failure modes and their effects
- FMEDA – Failure Mode, Effects and Diagnostic Analysis, including safety mechanism effectiveness
- Fault Tree Analysis (FTA) – Analysis of potential causes of safety goal violations
- Dependent Failure Analysis (DFA) – Identification and assessment of dependent and common-cause failures
- FIT-Rate Analysis – Failure-rate allocation, calculation, and evaluation
- Diagnostic Coverage (DC) Analysis – Evaluation of safety mechanism diagnostic effectiveness
- SPFM Analysis – Single-Point Fault Metric calculation and evaluation
- LFM Analysis – Latent Fault Metric calculation and evaluation
- PMHF Analysis – Probabilistic Metric for random Hardware Failures
- Safety Mechanism Effectiveness Analysis – Evaluation of coverage, detection time, and fault reaction
- Safety Metrics Consolidation – Consolidation of analysis results and generation of the required safety evidence for the IC/IP safety case
Contact
Tel.: +49 89 787 475-271
E-Mail: